1. Field of the Invention
The present invention relates to a data transmission circuit of a semiconductor device, and more particularly, the present invention relates to a control signal generation circuit which generates control signals used for data write and/or read operations, a data transmission circuit containing the control signal generation circuit, and a method of transmitting data.
A claim of priority under 35 U.S.C. §119 is made to Korean Patent Application No. 2003-639, filed 6 Jan. 2003, the contents of which are hereby incorporated by reference in its entirety as if fully set forth therein.
2. Description of the Related Art
When a semiconductor system receives input data from an external source, it is typically supplied with a strobe signal indicative of a start of the data and a sampling time. If a time gap exists between the strobe signal and a clock signal with which the semiconductor system operates, a receiving circuit is needed to compensate for the time gap so as to securely receive the externally supplied input data. This time gap can occur between semiconductor systems which operate with the same clock signal and semiconductor systems which operate with different clock signals.
Also, even though they are synchronized with the same clock signal, a time gap also occurs between the strobe signal and the data as a result of delays in data paths, packages or sockets. Thus, a compensation circuit is needed to prevent the time gap from causing the semiconductor system to operate abnormally. The compensation circuit samples externally supplied input data in synchronization with the strobe signal and increases a bit time of the sampled data using a parallel latch or a flip-flop. Thereafter, the compensation circuit samples the sampled data again using an internal clock signal and outputs re-sampled data. Here, the bit time amounts to half of one period of the internal clock signal.
While the compensation circuit can maintain the sample time and hold time by increasing the bit time of the sampled data, a latency is introduced when data is sampled. That is, the compensation circuit creates an undesired latency between data input and output, which in turn increases a data access time of the semiconductor system.